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MC74AC574, MC74ACT574 Octal D Flip-Flop with 3-State Outputs
The MC74AC574/74ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The MC74AC574/74ACT574 is functionally identical to the MC74AC374/74ACT374 except for the pinouts.
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* Inputs and Outputs on Opposite Sides of Package Allowing Easy * * * * * *
Interface with Microprocessors Useful as Input or Output Port for Microprocessors Functionally Identical to MC74AC374/74ACT374 3-State Outputs for Bus-Oriented Applications Outputs Source/Sink 24 mA ACT574 Has TTL Compatible Inputs Pb-Free Packages are Available
VCC 20 O0 19 O1 18 O2 17 O3 16 O4 15 O5 14 O6 13 O7 12 CP 11 1 1
PDIP-20 N SUFFIX CASE 738
SOIC-20W DW SUFFIX CASE 751D 1
TSSOP-20 DT SUFFIX CASE 948E
1 OE
2 D0
3 D1
4 D2
5 D3
6 D4
7 D5
8 D6
9 D7
10 GND 1
SOEIAJ-20 M SUFFIX CASE 967
Figure 1. Pinout: 20-Lead Packages Conductors
(Top View)
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 6 of this data sheet.
PIN ASSIGNMENT
PIN D0-D7 CP OE O0-O7 FUNCTION Data Inputs Clock Pulse Input 3-State Output Enable Input 3-State Outputs
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
D0 D1 D2 D3 D4 D5 D6 D7 CP OE O0 O1 O2 O3 O4 O5 O6 O7
Figure 2. Logic Symbol
(c) Semiconductor Components Industries, LLC, 2006
1
December, 2006 - Rev. 8
Publication Order Number: MC74AC574/D
MC74AC574, MC74ACT574
FUNCTIONAL DESCRIPTION FUNCTION TABLE
Inputs OE H H H H L L L L CP H H D L H L H L H L H Internal Q NC NC L H L H NC NC Outputs Function On Z Z Z Z L H NC NC Hold Hold Load Load Data Available Data Available No Change in Data No Change in Data
The MC74AC574/74ACT574 consists of eight edgetriggered flip-flops with individual D-type inputs and 3-state true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.
H H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOW-to-HIGH Clock Transition NC = No Change
D0 CP C Q D C Q
D1
D2
D3
D4
D5
D6
D7
D
C Q
D
C Q
D
C Q
D
C Q
D
C Q
D
C Q
D
OE O0 O1 NOTE: O2 O3 O4 O5 O6 O7
This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIN IOUT ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC74AC574, MC74ACT574
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 - - - - - - -40 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 5.5 VCC - - - - - 140 85 -24 24 ns/V C C mA mA ns/V V V Unit
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) 3.0 4.5 5.5 VIL Maximum Low Level Input Voltage 3.0 4.5 5.5 VOH Minimum High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 TA = +25C Typ VIH Minimum High Level Input Voltage 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - - - - 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 - - 8.0 74AC TA = -40C to +85C Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 *VIN = VIL or VIH 2.46 3.76 4.76 0.1 0.1 0.1 *VIN = VIL or VIH 0.44 0.44 0.44 1.0 75 -75 80 mA mA mA mA V 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND V V -12 mA IOH -24 mA -24 mA IOUT = 50 mA V IOUT = -50 mA V VOUT = 0.1 V or VCC - 0.1 V V VOUT = 0.1 V or VCC - 0.1 V Unit Conditions
* All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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MC74AC574, MC74ACT574
AC CHARACTERISTICS (For Figures and Waveforms - See AND8277/D at www.onsemi.com)
74AC Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay CP to On Propagation Delay CP to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 75 95 3.5 2.0 3.5 2.0 2.5 2.0 3.0 1.5 4.0 2.0 2.0 1.5 TA = +25C CL = 50 pF Typ - - - - - - - - - - - - - - Max - - 13.5 9.5 12 8.5 11 8.5 10.5 8.0 12 9.5 9.0 7.5 74AC TA = -40C to +85C CL = 50 pF Min 60 85 3.5 2.0 3.5 2.0 2.5 2.0 3.5 2.0 4.5 2.0 2.5 1.5 Max - - 15 11 13.5 9.5 12 9.0 11.5 9.0 13 10.5 10 8.5 MHz ns ns ns ns ns ns 3-3 3-6 3-6 3-7 3-8 3-7 3-8 Unit Fig. No.
* Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
AC OPERATING REQUIREMENTS
74AC Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Typ ts th tw Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP 3.3 5.0 3.3 5.0 3.3 5.0 - - - - - - 74AC TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Minimum 2.5 1.5 1.5 1.5 6.0 4.0 3.0 2.0 1.5 1.5 7.0 5.0 ns ns ns 3-9 3-9 3-6
CP Pulse Width HIGH or LOW *Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC574, MC74ACT574
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN DICCT IOZ Maximum Input Leakage Current Additional Max. ICC/Input Maximum 3-State Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 0.6 - 0.5 - - 8.0 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 74ACT TA = -40C to +85C Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1.5 5.0 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA *VIN = VIL or VIH IOH -24 mA -24 mA IOUT = 50 mA *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC - 2.1 V VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND Unit Conditions
V
V
V
mA mA mA mA mA mA
IOLD IOHD ICC
5.5 5.5 5.5
- - -
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms - See AND8277/D at www.onsemi.com)
74ACT Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay CP to On Propagation Delay CP to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 5.0 5.0 5.0 5.0 5.0 5.0 5.0 100 2.5 2.0 2.0 2.0 2.0 2.0 TA = +25C CL = 50 pF Typ - - - - - - - Max - 11 10 9.5 9.0 10.5 8.5 74ACT TA = -40C to +85C CL = 50 pF Min 85 2.0 1.5 1.5 1.5 1.5 1.5 Max - 12 11 10 10 11.5 9.0 ns ns ns ns ns ns ns 3-3 3-6 3-6 3-7 3-8 3-7 3-8 Unit Fig. No.
*Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC574, MC74ACT574
AC OPERATING REQUIREMENTS
74ACT Symbol Parameter VCC* (V) Typ ts th tw Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP 5.0 5.0 5.0 - - - 2.5 1.0 3.0 TA = +25C CL = 50 pF 74ACT TA = -40C to +85C CL = 50 pF Guaranteed Minimum 2.5 1.0 4.0 ns ns ns 3-9 3-9 3-6 Unit Fig. No.
CP Pulse Width HIGH or LOW *Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 40 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
MARKING DIAGRAMS
PDIP-20
SOIC-20W
TSSOP-20
SOEIAJ-20
20 20 MC74AC574N AWLYYWWG 1 1 AC574 AWLYYWWG
20 AC 574 ALYWG G 1
20 74AC574 AWLYWWG 1
20 20 MC74ACT574N AWLYYWWG 1 1 ACT574 AWLYYWWG
20 ACT 574 ALYWG G 1
20 74ACT574 AWLYWWG 1
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location)
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MC74AC574, MC74ACT574
ORDERING INFORMATION
Device MC74AC574N MC74AC574NG MC74ACT574N MC74ACT574NG MC74AC574DW MC74AC574DWG MC74AC574DWR2 MC74AC574DWR2G MC74ACT574DW MC74ACT574DWG MC74ACT574DWR2 MC74ACT574DWR2G MC74AC574DTR2 MC74AC574DTR2G MC74ACT574DTR2 MC74ACT574DTR2G MC74AC574M MC74AC574MG MC74AC574MEL MC74AC574MELG MC74ACT574M MC74ACT574MG MC74ACT574MEL MC74ACT574MELG Package PDIP-20 PDIP-20 (Pb-Free) PDIP-20 PDIP-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) TSSOP-20* TSSOP-20* TSSOP-20* TSSOP-20* SOEIAJ-20 SOEIAJ-20 (Pb-Free) SOEIAJ-20 SOEIAJ-20 (Pb-Free) SOEIAJ-20 SOEIAJ-20 (Pb-Free) SOEIAJ-20 SOEIAJ-20 (Pb-Free) 2000 / Tape & Reel 40 Units / Rail 2000 / Tape & Reel 40 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 38 Units / Rail 1000 / Tape & Reel 38 Units / Rail 18 Units / Rail Shipping
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These packages are inherently Pb-Free.
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MC74AC574, MC74ACT574
PACKAGE DIMENSIONS
PDIP-20 N SUFFIX PLASTIC DIP PACKAGE CASE 738-03 ISSUE E
-A-
20 1 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
B
10
C
L
-T-
SEATING PLANE
K M E G F D
20 PL
N J 0.25 (0.010)
M 20 PL
0.25 (0.010) TA
M
M
TB
M
DIM A B C D E F G J K L M N
INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040
MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01
SOIC-20W DW SUFFIX CASE 751D-05 ISSUE G
D
A
11 X 45 _
q
H
M
B
M
20
10X
0.25
E
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
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L
MC74AC574, MC74ACT574
PACKAGE DIMENSIONS
TSSOP-20 DT SUFFIX CASE 948E-02 ISSUE C
K REF
M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 6.40 6.60 0.252 0.260 B 4.30 4.50 0.169 0.177 --- --- 0.047 C 1.20 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC -W- H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0_ 8_ 0_ 8_
20X
2X
L/2
20
11
J J1 B -U- N
L
PIN 1 IDENT 1 10
0.15 (0.006) T U
S
A -V-
N F DETAIL E
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
SOLDERING FOOTPRINT*
7.06 1
16X
0.36
16X
1.26
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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IIII IIII IIII
SECTION N-N 0.25 (0.010) M
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
K K1
0.65 PITCH
DIMENSIONS: MILLIMETERS
MC74AC574, MC74ACT574
PACKAGE DIMENSIONS
SOEIAJ-20 M SUFFIX CASE 967-01 ISSUE A
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.15 0.25 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.81 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.006 0.010 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.032
b 0.13 (0.005)
M
A1 0.10 (0.004)
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PUBLICATION ORDERING INFORMATION
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MC74AC574/D

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